The ITC59100 Test Measurement Unit (TMU), which plugs into the ITC59000 Test Platform, performs gate charge (Qg) measurements that conform to MIL-STD-750C, Notice 2, Method 3471 and JEDEC Standard JESD24-2. In addition the ITC59100 TMU performs an internal gate resistance (Rg) test method that conforms to JEDEC Standard JESD24-11.

The ITC59100 TMU has an electronic Gate Current Regulator, a Drain Current Regulator, and the Logic needed to test a variety of MOSFET and IGBT package types, over a wide range of user programmable voltage, current, and time parameters.

In order to ensure accurate, noise-free measurements, each TMU is cable-connected to a measurement pod that is located as close as practical to the handler or to a manual test socket. This measurement pod measures the current and voltage values and captures the Drain and Gate waveforms. This information is then digitized and transmitted to the TMU for evaluation. Sort Criteria for each test can be defined. The ITC59000 combines the results from each TMU to sort devices to physical handler bins.

• Controlled by an onboard microprocessor
• Maximum of 100 volts and 100 Amperes for the Drain voltage and current
• Maximum of 10 mA of Gate current and +/- 20 volts
• Fast Kelvin Test on all test channel connections
• Accurate I and V waveform digitization

The ITC59200 TMU test measurement unit runs in the ITC59000 test platform and is designed to measure the thermal response of power MOSFET and IGBT devices when power is applied.

The ITC59200 is designed to provide two test functions: Die Attach and FBSOA (Forward Bias Safe Operating Area). Die Attach testing is performed to detect voids under the die and other types of device construction flaws that could affect the reliability, lifetime and SOA of the device. The FBSOA non-destructive test is used to determine the Safe Operating Area of the device. This is defined as the voltage and current conditions at which the device is expected to operate without damaging the device. Up to four TMUs can be installed in the ITC59000 for true parallel device testing. These can be a combination of the ITC59200 and the ITC59100 Gate Charge/Gate Resistance TMUs.

Sort Criteria for each test can be defined. The ITC59000 combines the results from each TMU to sort devices to physical handler bins.

• Single ITC59000 chassis can contain up to 4 ea ITC59200 TMU's
• Fully simultaneous testing of half bridge devices
• Increased power by using 2 slots in ITC59000
• Gate voltage compliance +/- 12 V.
• Fast Kelvin Test on all test channel connections
• Accurate I and V waveform digitization